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For the figure shown, each flip flop has a propagation delay of 10 ns. Determine the total propagation delay from the triggering edge of a clock pulse until a corresponding change can occur in the state of Q3.

For the figure shown, each flip flop has a propagation delay of 10 ns. Determine the total propagation delay from the triggering edge of a clock pulse until a corresponding change can occur in the state of Q3. Correct Answer 40 ns

Concept:

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Asynchronous sequential circuit

An example of an asynchronous sequential circuit is shown below:

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In this circuit, the output of the first flip flop is acting as the input to the second flip flop. The changes in the second flip flop will be based on the output of the first one and the same procedure goes on for the remaining stages.

The delay will increase in these types of circuits.

NOTE: The total delay at the end of the final stage is n × tpd

n: total number of flip flops used.

tpd: propagation delay of each flip flop.

Calculation:

The given circuit is asynchronous and the clock is rippled.

Each flip-flop has a delay of 10 ns and a total 4 used.

The delay at the Q3 will be 4 × 10 ns

T = 40 ns

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