Consider the following code sequence having five instructions I1 to I5. Each of these instructions has the following format. OP Ri, Rj, Rk Where operation OP is performed on contents of registers Rj and Rk and the result is stored in register Ri I1: ADD R1, R2, R3 I2: MUL R7, R1, R3 I3: SUB R4, R1, R5 I4: ADD R3, R2, R4 I5: MUL R7, R8, R9 Consider the following three statements. S1: There is an anti-dependence between instructions I2 and I5 S2: There is an anti-dependence between instructions I2 and I4 S3: Within an instruction pipeline an anti-dependence always creates one or more stalls Which one of the above statements is/are correct?
Consider the following code sequence having five instructions I1 to I5. Each of these instructions has the following format. OP Ri, Rj, Rk Where operation OP is performed on contents of registers Rj and Rk and the result is stored in register Ri I1: ADD R1, R2, R3 I2: MUL R7, R1, R3 I3: SUB R4, R1, R5 I4: ADD R3, R2, R4 I5: MUL R7, R8, R9 Consider the following three statements. S1: There is an anti-dependence between instructions I2 and I5 S2: There is an anti-dependence between instructions I2 and I4 S3: Within an instruction pipeline an anti-dependence always creates one or more stalls Which one of the above statements is/are correct? Correct Answer Only S2 is true
Concept:
Anti- dependence: It is also known as write after read, occurs when an instruction requires a value that is later updates.
Anti-dependency can be overcome in pipeline using register renaming.
Explanation:
Instructions are:
I1: R1 = R2 + R3
I2: R7 = R1 * R3
I3: R4 = R1 – R5
I4: R3 = R2 + R4
I5: R7 = R8 * R9
Here, in this anti- dependencies (WAR) are:
I1 – I2
I1 – I3
I3 – I4
I4 – I1
I4 – I2
Statement 1: There is an anti-dependence between instructions I2 and I5
This statement is false, I2 and I5 don’t form any write after read operation. There is no anti dependency in this.
Statement 2: There is an anti-dependence between instructions I2 and I4
This statement is true, here I2 reads R3 and I4 writes it.
Statement 3: Within an instruction pipeline an anti-dependence always creates one or more stalls
This statement is false as anti- dependency can be removed by using register renaming in pipeline.