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In a 3-input CMOS NAND gate, the substrate terminals of NMOS transistors are grounded (lowest potential available in the circuit) and the substrate terminals of PMOS transistors are connected to VDD (maximum positive potential available in the circuit). Which of the following transistors may suffer in this circuit from the body bias effect?
The nMOS and pMOS transistors used in BiCMOS is ____________
When both nMOS and pMOS transistors of CMOS logic design are in OFF condition, the output is:
When both nMOS and pMOS transistors of CMOS logic gates are ON, the output is:
Consider the following statements regarding the Read Only Memory (ROM): 1. The stored data is lost if the power is removed. 2. It consists of an address decoder with a input lines and a programmable OR array with n output lines. 3. The minterms are ORed through the programmable switches which can be made ON or OFF to select a particular minterm. The programmable switches can be implemented by either bipolar, CMOS, nMOS or pMOS technologies. 4. Mask-programmed ROMs are used in the application where the system requires data to be stored and to be changed during the operation. Which of the above statements are not correct ?
In CMOS fabrication, nMOS and pMOS are integrated in same substrate.
In BiCMOS, bipolar transistors are used to ___________
The transistors used in BiCMOS are __________
The transistors used in BiCMOS are . . . . . . . .
In BiCMOS, bipolar transistors are used to . . . . . . . .