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In a 3-input CMOS NAND gate, the substrate terminals of NMOS transistors are grounded (lowest potential available in the circuit) and the substrate terminals of PMOS transistors are connected to VDD (maximum positive potential available in the circuit). Which of the following transistors may suffer in this circuit from the body bias effect?

In a 3-input CMOS NAND gate, the substrate terminals of NMOS transistors are grounded (lowest potential available in the circuit) and the substrate terminals of PMOS transistors are connected to VDD (maximum positive potential available in the circuit). Which of the following transistors may suffer in this circuit from the body bias effect? Correct Answer 2 NMOS transistors

Body bias effect:

  • It is used to dynamically adjust the threshold voltage (Vt) of a CMOS transistor.
  • The voltage difference between the source voltage (Vs) and the body voltage (Vb) affects the threshold voltage (Vt).
  • A 3-input 3 CMOS NAND gate consists of 3 NMOS and 3 PMOS transistor as shown:

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  • As seen in the diagram, only M2 and M3 are two transistors where the potential difference between the source and body is present.
  • So 2-NMOS transistors suffer body bias effect.

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