VLSI Design And Testing MCQ

Test your knowledge with important VLSI Design And Testing MCQ and their applications. These MCQs are beneficial for competitive exams too. Explore 30 + more VLSI Design And Testing MCQs at Bissoy

• The nMOS and pMOS transistors used in BiCMOS is . . . . . . . .
  ক

  Depletion mode

  খ

  Enhancement mode

  গ

  Only pMOS

  ঘ

  Only nMOS
• In n channel MOSFET . . . . . . . . is constant.
  ক

  Channel length

  খ

  Channel width

  গ

  Channel depth

  ঘ

  Channel concentration
• The collector contact region is doped with higher concentration of n-type impurities due to . . . . . . . .
  ক

  It creates a depletion region at the contact surface

  খ

  It creates a low conductivity path between collector region and contact

  গ

  It reduces contact resistance

  ঘ

  It can withstand high voltages as compared to collector region
• CMOS has . . . . . . . .
  ক

  High noise margin

  খ

  High packing density

  গ

  High power dissipation

  ঘ

  High complexity
• For improved base current discharge . . . . . . . . enhancement type nMOS devices have to be added.
  ক

  Two

  খ

  Three

  গ

  One

  ঘ

  Four
• In diffusion process . . . . . . . . . impurity is desired.
  ক

  n type

  খ

  p type

  গ

  np type

  ঘ

  None of the mentioned
• Latch-up is brought about by BJTs . . . . . . . .
  ক

  With positive feedback

  খ

  With negative feedback

  গ

  With no feedback

  ঘ

  Without BJT
• In inverter circuit . . . . . . . . . transistors is used as load
  ক

  Enhancement mode

  খ

  Depletion mode

  গ

  All of the mentioned

  ঘ

  None of the mentioned
• gm is . . . . . . . . on input voltage Vbe.
  ক

  Inversely proportional

  খ

  Proportional

  গ

  Exponentially dependent

  ঘ

  Is not dependent
• What is the design flow of VLSI system?<br>1. Architecture design<br>2. Market requirement<br>3. Logic design<br>4. HDL coding
  ক

  2-1-3-4

  খ

  4-1-3-2

  গ

  3-2-1-4

  ঘ

  1-2-3-4
• BiCMOS can be used in . . . . . . . .
  ক

  Amplifyig circuit

  খ

  Driver circuits

  গ

  Divider circuit

  ঘ

  Multiplier circuit
• In nMOS device, gate material could be . . . . . . . .
  ক

  Silicon

  খ

  Polysilicon

  গ

  Boron

  ঘ

  Phosphorus
• In BiCMOS inverter, the BJT used are . . . . . . . .
  ক

  Only Npn BJT

  খ

  Only Pnp BJT

  গ

  Both npn and pnp BJT

  ঘ

  Multi emitter npn BJT
• nMOS is . . . . . . . .
  ক

  Donor doped

  খ

  Acceptor doped

  গ

  All of the mentioned

  ঘ

  None of the mentioned
• nMOS fabrication process is carried out in . . . . . . . .
  ক

  Thin wafer of a single crystal

  খ

  Thin wafer of multiple crystals

  গ

  Thick wafer of a single crystal

  ঘ

  Thick wafer of multiple crystals
• Enhancement mode MOSFETs are more commonly used as . . . . . . . .
  ক

  Switches

  খ

  Resistors

  গ

  Buffers

  ঘ

  Capacitors
• MOSFET is used as . . . . . . . .
  ক

  Current source

  খ

  Voltage source

  গ

  Buffer

  ঘ

  Divider
• Electrical charge flows from . . . . . . . . .
  ক

  Source to drain

  খ

  Drain to source

  গ

  Source to ground

  ঘ

  Source to gate
• The gate region consists of . . . . . . . .
  ক

  Insulating layer

  খ

  Conducting layer

  গ

  Lower metal layer

  ঘ

  p type layer
• Chemical Mechanical Polishing is used to . . . . . . . .
  ক

  Remove silicon oxide

  খ

  Remove silicon nitride and pad oxide

  গ

  Remove polysilicon gate layer

  ঘ

  Reduce the size of the layout
• nMOS devices are formed in . . . . . . . .
  ক

  p-type substrate of high doping level

  খ

  n-type substrate of low doping level

  গ

  p-type substrate of moderate doping level

  ঘ

  n-type substrate of high doping level
• Ids is . . . . . . . . to length L of the channel.
  ক

  Directly proportional

  খ

  Inversely proportional

  গ

  Not related

  ঘ

  Logarithmically related
• n the region where inverter exhibits gain, the two transistors are in . . . . . . . . region.
  ক

  Linear

  খ

  Cut-off

  গ

  Non saturation

  ঘ

  Saturation
• Transconductance can be increased by . . . . . . . .
  ক

  Decreasing the width

  খ

  Increasing the width

  গ

  Increasing the length

  ঘ

  Decreasing the length
• Latch-up can be induced by . . . . . . . .
  ক

  Incident radiation

  খ

  Reflected radiation

  গ

  Etching

  ঘ

  Diffracted radiation
• The reduction in carrier lifetime brings about . . . . . . . .
  ক

  Reduction in alpha

  খ

  Reduction in beta

  গ

  Reduction in current

  ঘ

  Reduction in voltage
• . . . . . . . . architecture is used to design VLSI.
  ক

  System on a device

  খ

  Single open circuit

  গ

  System on a chip

  ঘ

  System on a circuit
• The inverter has . . . . . . . .
  ক

  Low input impedance

  খ

  High input impedance

  গ

  High output impedance

  ঘ

  High input and output impedance
• Bipolar transistor exhibits . . . . . . . . delay.
  ক

  Turn on

  খ

  Turn off

  গ

  Storage

  ঘ

  All of the mentioned
• Source in MOS transistors is doped with . . . . . . . . . material.
  ক

  n-type

  খ

  p-type

  গ

  n &amp; p type

  ঘ

  None of the mentioned