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What gate is placed between clock input and the input of AND gate to convert a positive level triggered flip – flop to a negative level triggered flip – flop?

What gate is placed between clock input and the input of AND gate to convert a positive level triggered flip – flop to a negative level triggered flip – flop? Correct Answer NOR gate

The negative level triggered the flip – flop in Digital Electronics changes its state when the clock is negative. Thus, a negative level triggered flip – flop has a NOT gate present between clock input and the input of AND gate.

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