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When a negative voltage is applied on the gate terminal, a N channel is formed between N-type source, P-type substrate and N-type drain terminal of an enhancement type MOSFET.

When a negative voltage is applied on the gate terminal, a N channel is formed between N-type source, P-type substrate and N-type drain terminal of an enhancement type MOSFET. Correct Answer False

When a negative voltage is applied on the gate terminal, a P channel is formed between N-type source, P-type substrate and N-type drain terminal. When the negative voltage is applied on the gate terminal, it attracts all the holes from the P-type substrate and forms a p-channel between source and drain.

Related Questions

The Transfer characteristic of the different types of MOSFETs is shown below, where ID is drain current and VGS is the Gate-Source voltage, the correct combination of MOSFET w.r.t to transfer characteristics is: Types of MOSFET (P) P – Channel Enhancement MOSFET (Q) P – Channel Depletion MOSFET (R) N – Channel Enhancement MOSFET (S) N – Channel Depletion MOSFET
Which type of channel is formed, between P-type source, N-type substrate and P-type drain terminal, when a positive voltage is applied on the gate terminal of an enhancement type MOSFET?
Consider the following statements regarding n-channel JFET: 1. The maximum drain current IDSS occurs when gate-to-source voltage VGS = 0 V and drain-to-source voltage VDS ≥ |VP|. (VP is pinch-off voltage). 2. For gate-to-source voltage VGS less than the pinch-off level, the drain current is 0 A. 3. For all levels of VGS between 0 V and the pinch-off level, the current ID will range between IDSS and 0 A, respectively. which of the above statements are correct ?
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The following statements refer to an n channel FET operated in the active region: 1. The gate voltage VGS reverse biases the junction 2. The drain voltage VDD is negative with respect to the source 3. The current in the n channel is due to electrons 4. Increasing the reveres bias VGS increases the cross section for conduction Which of these statements are correct?
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Find the current through gate if the FET was given with gate to source voltage =10V and drain to source voltage =20V, the pinch off voltage was -2V and ID=2mA.