Bissoy.com
Doctors Medicines MCQs Q&A

Consider a memory chip with 24 address pins and 16 data pins. How many locations will it accommodate?

Consider a memory chip with 24 address pins and 16 data pins. How many locations will it accommodate? Correct Answer 2<sup>24</sup>

The correct answer is option 1.

Concept:

Memory Chips:

  • The number of address pins is related to the number of memory locations.
  • The data pins are typically bi-directional in read-write memories. The number of data pins is related to the size of the memory location.

Explanation:

Given that, 

Address pins= 24 (is related to the number of memory locations)

Data pins= 16 (It is related to the size of the memory location)

So For 'N-Bits' address pins, the number of locations that will accommodate is 2N.

So For '24-Bits' address pins, the number of locations that will accommodate is 224.

Hence the correct answer is 224.

Additional Information Given that, 

Data pins= 16 (It is related to the size of the memory location)

So Each size of the memory location is 16 bits.

So the size of the memory ship is= number of memory locations x size of the memory location

the size of the memory ship is= 224x16.

Related Questions

The chip select logic for a certain DRAM chip in a memory system design is shown below. Assume that the memory system has 16 address lines denoted by A15 to A0. What is the range of addresses (in hexadecimal) of the memory system that can get enabled by the chip select (CS) signal?
On a non-pipelined sequential processor, a program segment, which is a part of the interrupt service routine, is given to transfer 500 bytes from an I/O device to memory.     Initialize the address register     Initialize the count to 500 LOOP: Load a byte from device     Store in memory at address given by address register     Increment the address register     Decrement the count     If count! = 0 go to LOOP Assume that each statement in this program is equivalent to a machine instruction which takes one clock cycle to execute if it is a non-load/store instruction. The load-store instructions take two clock cycles to execute. The designer of the system also has an alternate approach of using the DMA controller to implement the same transfer. The DMA controller requires 20 clock cycles for initialization and other overheads. Each DMA transfer cycle takes two clock cycles to transfer one byte of data from the device to the memory. What is the approximate speedup when the DMA controller based design is used in place of the interrupt driven program based input-output?
With regard to computer memory, which of the following statement(s) is/are TRUE?  (A) Cache memory is 'volatile' memory. (B) Magnetic memory is 'volatile' memory.  (C) Flash memory is 'volatile' memory. (D) RAM is 'volatile' memory. Choose the correct answer from the option given below:
Which of the following statements is/are correct? 1. An address generated by the CPU is commonly referred to as a physical address. 2. An address seen by the memory unit is commonly referred to as a logical address. 3. The run-time mapping from virtual to physical address is done by the memory management unit (MMU). Select the correct answer using the code given below.
Two statements are given, followed by three conclusions numbered I, II and III. Assuming the statements to be true, even if they seem to be at variance with commonly known facts, decide which of the conclusions logically follow(s) from the statements. Statements: Some pins are roses. No rose is a machine. Conclusions: I. Some roses are pins. II. Some pins are not machines. III. All machines are pins.
Which of the following statements are true?
Statement I Big data refers to no precise quantity, but generally refers to data in the range of Petabytes and Exabyte, i.e. billions to trillions of records, all from various sources. Big data is generated much faster. than traditional data in much larger quantities.
Statement II Big data interests industries because they are able to learn more patterns and curious variances than smaller data sets, with the capability to provide valuable insights into consumer behaviour, weather systems, financial market activity, or other phenomena.
Statement III Various departments and product lines use various applications within most organisations and store data in separate datasets. These separate databases may contain similar data, but data from one data base to another is not always consistent. This is called data silo.
Assertion (A): Each memory chip has its own address latch.
Reason (R): ALE signal comes out of microprocessor 8085 and goes to memory chip.
There are three statements which are followed by four conclusions. Choose the conclusions which logically follow from the given statements. Statements: Some cups are pins.
Some pins are covers.
All the covers are pens. Conclusions : 1) Some pens are pins 2) Some covers are cups 3) No cup is pin 4) Some pins are cups
When we use auto increment or auto decrements, which of the following is/are true? 1) In both, the address is used to retrieve the operand and then the address gets altered 2) In auto increment, the operand is retrieved first and then the address altered 3) Both of them can be used on general purpose registers as well as memory locations
Consider a machine with a byte addressable main memory of 220 bytes, block size of 16 bytes and a direct mapped cache having 212 cache lines. Let the addresses of two consecutive bytes in main memory be (E201F)16 and (E2020)16. What are the tag and cache line address (in hex) for main memory address (E201F)16?