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A memory connected to a microprocessor has 20 address lines and 16 data lines. What will be the memory capacity?
The statement concern psychrometric chart. 1. Constant relative humidity lines are uphill straight lines to the right 2. Constant wet bulb temperature lines are downhill straight lines to the right. 3. Constant specific volume lines are downhill straight lines to the right. 4. Constant enthalpy lines are coincident with constant wet bulb temperature lines. Which of the statements are correct?
With regard to computer memory, which of the following statement(s) is/are TRUE?  (A) Cache memory is 'volatile' memory. (B) Magnetic memory is 'volatile' memory.  (C) Flash memory is 'volatile' memory. (D) RAM is 'volatile' memory. Choose the correct answer from the option given below:
On a non-pipelined sequential processor, a program segment, which is a part of the interrupt service routine, is given to transfer 500 bytes from an I/O device to memory.     Initialize the address register     Initialize the count to 500 LOOP: Load a byte from device     Store in memory at address given by address register     Increment the address register     Decrement the count     If count! = 0 go to LOOP Assume that each statement in this program is equivalent to a machine instruction which takes one clock cycle to execute if it is a non-load/store instruction. The load-store instructions take two clock cycles to execute. The designer of the system also has an alternate approach of using the DMA controller to implement the same transfer. The DMA controller requires 20 clock cycles for initialization and other overheads. Each DMA transfer cycle takes two clock cycles to transfer one byte of data from the device to the memory. What is the approximate speedup when the DMA controller based design is used in place of the interrupt driven program based input-output?
Which of the following statements is/are correct? 1. An address generated by the CPU is commonly referred to as a physical address. 2. An address seen by the memory unit is commonly referred to as a logical address. 3. The run-time mapping from virtual to physical address is done by the memory management unit (MMU). Select the correct answer using the code given below.
Which of the following statements regarding interface circuit are correct? 1. Electrical buffering is needed when the peripheral operates at a different voltage or current to that on the microprocessor bus system or there are different ground references. 2. Timing control is needed when the data transfer rates of the peripheral and the microprocessor are different. 3. Changing the number of lines is needed when the codes used by the peripherals differ from those used by the microprocessor.
If the microprocessor has 10 address lines, then the number of memory locations it is able to address is
Consider a machine with a byte addressable main memory of 220 bytes, block size of 16 bytes and a direct mapped cache having 212 cache lines. Let the addresses of two consecutive bytes in main memory be (E201F)16 and (E2020)16. What are the tag and cache line address (in hex) for main memory address (E201F)16?
What is the total memory range and memory map, if for a 16-bit address bus; A15 = 1, A14 = 0, and A13 – A11 are connected to enable decoder input lines? A15, and A14, are connected to enable the decoder.
To address a memory location out of N memory locations, the number of address lines required is