Implementing Gates with Different Modelling MCQ

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• Generally, structural modeling is used with another modeling style.
  ক

  True

  খ

  False
• For gates, which of the following modeling style will corresponds to shortest code?
  ক

  Behavioral

  খ

  Data flow

  গ

  Structural

  ঘ

  Both data flow and behavioral
• In CPLD, there are many input switches arranged in a switch bank, if an AND gate is behaving oddly but could be the reason?
  ক

  Incorrect interconnections

  খ

  Concurrent execution of statements

  গ

  Mismatch of ports name and switches

  ঘ

  Wrong libraries included
• The odd behavior of gates in dataflow modeling may be the result of ________
  ক

  Sequential statements

  খ

  Wrong logic definitions

  গ

  Concurrency

  ঘ

  Inappropriate assignments
• Sometimes gates modeled with ________ modeling may behave differently.
  ক

  Dataflow

  খ

  Behavioral

  গ

  Structural

  ঘ

  Structural and Behavioral
• Which of the following logic describes the EXOR gate?
  ক

  y <= ((not ] OR (not OR (not OR AND (not AND (not AND

  খ

  ) AND ((not a) OR (not [); [ y <= ((not a) OR [ AND (a OR (not [)

  গ

  y <= ((not a) AND (not b)) OR ((not a) AND (not b));

  ঘ

  y <= ((not a) AND b) OR (a AND (not b));
• What is the minimum number of NAND gates required to implement an EXOR gate?
  ক

  2

  খ

  3

  গ

  4

  ঘ

  5
• Which of the following is not needed when modeling a simple gate?
  ক

  Library

  খ

  Entity

  গ

  Architecture

  ঘ

  Configuration
• By how many modeling styles, the gates in VHDL can be implemented?
  ক

  1

  খ

  2

  গ

  3

  ঘ

  4
• Which of the following gate is a universal gate?
  ক

  AND

  খ

  NAND

  গ

  EXOR

  ঘ

  EXNOR
• Which of the following is a basic building block of digital logic?
  ক

  Wires

  খ

  Nets

  গ

  Gates

  ঘ

  Flip-flops