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Which of the following parameters govern the value of the shear angle in continuous chip formation?
Shear velocity during machining process is 0.2m/s with chip thickness ratio of 0.6. Shear angle is 30 degree and rake angle is 15 degree. What is the value of cutting velocity?
Shear velocity during the machining process is 1.2m/s with chip thickness ratio of 0.6. Shear angle is 30 degree and rake angle is 15 degree. What is the value of cutting velocity?
Tresca or maximum-shear stress criteria assumes that yielding occurs when the maximum shear stress reaches a value of the shear stress in the uniaxial tension test. Assume the principal stress being σ1, σ2, σ3 where σ1 is largest, and σ3 is the smallest principal stresses. Find the value of minimum shear stress to cause yielding, given that yield stress in tension is equal to σo?
In the metal cutting operation, what will be the shear angle when a cutting tool has positive rake angle α = 20°. The friction angle is 40°. (Use Merchant's shear angle theory)
If t1 denotes the uncut chip thickness and t2 denotes cut chip thickness ratio then, which of the following equation is correct about chip thickness ratio ‘r’?
The Rheological behaviour of concrete, when represented by shear stress vs rate of shear, is characterized as Where : τ shear stress, Τ0 = (initial) yield value, μ = at-point plastic viscosity, γ̇ = at point rate of shear.
Angle ‘A’ of a cyclic quadrilateral ABCD is 53° less then angle B. Angle B is twice of angle C and angle C is 40° more than angle D. What would be the measure of angle A?
In orthogonal turning of a low carbon steel bar of diameter 150 mm with uncoated carbide tool, the cutting velocity is 90 m/min. The feed is 0.24 mm/rev and the depth of cut is 2 mm. The chip thickness obtained is 0.48 mm. If the orthogonal rake angle is zero and the principle cutting edge angle is 90°, the shear angle in degree is
The chip select logic for a certain DRAM chip in a memory system design is shown below. Assume that the memory system has 16 address lines denoted by A15 to A0. What is the range of addresses (in hexadecimal) of the memory system that can get enabled by the chip select (CS) signal?