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Suppose you are compiling on a machine with 1-byte chars, 2-byte shorts, 4-byte ints, and 8-byte doubles, and with alignment rules that require the address of every primitive data element to be an integer multiple of the element's size. Suppose further that the compiler is not permitted to reorder fields: padding is used to ensure alignment. How much space will be consumed by the following array? struct { short s; char c; short t; char d; double r; int i; } A[10]; /*10-element array of structs*/
Which of the following are legal lines of Java code?
1. int w = (int)888.8;2. byte x = (byte)100L;3. long y = (byte)100;4. byte z = (byte)100L;
On a non-pipelined sequential processor, a program segment, which is a part of the interrupt service routine, is given to transfer 500 bytes from an I/O device to memory.     Initialize the address register     Initialize the count to 500 LOOP: Load a byte from device     Store in memory at address given by address register     Increment the address register     Decrement the count     If count! = 0 go to LOOP Assume that each statement in this program is equivalent to a machine instruction which takes one clock cycle to execute if it is a non-load/store instruction. The load-store instructions take two clock cycles to execute. The designer of the system also has an alternate approach of using the DMA controller to implement the same transfer. The DMA controller requires 20 clock cycles for initialization and other overheads. Each DMA transfer cycle takes two clock cycles to transfer one byte of data from the device to the memory. What is the approximate speedup when the DMA controller based design is used in place of the interrupt driven program based input-output?
A machine in which the least significant byte is stored in the smallest address is __________
An array of 2 two byte integers is stored in big endian machine in byte addresses as shown below. What will be its storage pattern in little endian machine? Address Data 0 × 104 78 0 × 103 56 0 × 102 34 0 × 101 12
A manufacturer builds a machine which will address 500 envelopes in 8 minutes. He wishes to build another machine so that when both are operating together they will address 500 envelopes in 2 minutes. The equation used to find how many minutes x it would require the second machine to address 500 envelopes alone, is = ?
Following declaration of an array of struct, assumes size of byte, short, int and long are 1, 2, 3 and 4 respectively. Alignment rule stipulates that n-type field must be located at an address divisible by n. the fields in a struct are not rearranged, padding is used to ensure alignment. All elements of array should be of same size. Struct complx                 Short s                 Byte b                 Long l                 Int i End complx Complx C[10] Assuming C is located at an address divisible by 8, what is the total size of C, in bytes?
Which of the following statements is/are correct? 1. An address generated by the CPU is commonly referred to as a physical address. 2. An address seen by the memory unit is commonly referred to as a logical address. 3. The run-time mapping from virtual to physical address is done by the memory management unit (MMU). Select the correct answer using the code given below.
Which two statements describe the IP address 10.16.3.65/23?
1. The subnet address is 10.16.3.0 255.255.254.0.
2. The lowest host address in the subnet is 10.16.2.1 255.255.254.0.
3. The last valid host address in the subnet is 10.16.2.254 255.255.254.0.
4. The broadcast address of the subnet is 10.16.3.255 255.255.254.0.
With reference to 8085 microprocessor, which of the following statements are correct? 1. INR is 1-byte instruction 2. OUT is 2-byte instruction 3. STA is 3-byte instruction