Bissoy.com
Doctors Medicines MCQs Q&A

Related Questions

A computer handles several interrupt sources of which the following are relevant for this question. Interrupt from CPU temperature sensor (raises interrupt if CPU temperature is too high) Interrupt from Mouse (raises interrupt if the mouse is moved or a button is pressed) Interrupt from Keyboard (raises interrupt when a key is pressed or released) Interrupt from Hard Disk (raises interrupt when a disk read is completed) Which one of these will be handled at the HIGHEST priority?
The priority level of an interrupt of 8051 for which SI(serial interrupt) interrupt is programmed is
If a higher priority process arrives and wants service, the memory manager can swap out the lower priority process to execute the higher priority process. When the higher priority process finishes, the lower priority process is swapped back in and continues execution. This variant of swapping is sometimes called?
Consider the following statements: The 8259A Programmable Interrupt Controller can 1. Manage eight interrupts 2. Vector can interrupt request anywhere in the memory map 3. Have an 8-bit or 16-bit interval between interrupt vector locations 4. Be initialized with operational command words Which of the above statements are correct?
A lower priority function can interrupt the higher priority function.
In a microprocessor, the service routine for a certain interrupt starts from a fixed location of memory which cannot be externally set, but the interrupt can be delayed or rejected. Such an interrupt is  
What happens if we apply the below operations on an input sequence? i. construct a cartesian tree for input sequence ii. put the root element of above tree in a priority queue iii. if( priority queue is not empty) then iv. search and delete minimum value in priority queue v. add that to output vi. add cartesian tree children of above node to priority queue
A microprocessor accepts external interrupts (Ext INT) through a Programmable Interrupt Controller as shown in the figure. Assuming vectored interrupt, a correct sequence of operations when a single external interrupt (Ext INT1) is received will be :
The following are some events that occur after a device controller issues an interrupt while process L is under execution? (P) The processor pushes the process status onto the control stack. (Q) The processor finishes the execution of the current instruction. (R) The processor executes the interrupt service routine. (S) The processor pops the process status of from the control stack. (T) The processor loads the new PC value based on the interrupt. Which one of the following is the correct order in which the events above occur?
The _________ determines the cause of the interrupt, performs the necessary processing and executes a return from the interrupt instruction to return the CPU to the execution state prior to the interrupt.