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Consider the following solution to the producer-consumer synchronization problem. The shared buffer size is ?. Three semaphores empty, full and mutex are defined with respective initial values of 0, ? and 1. Semaphore empty denotes the number of available slots in the buffer, for the consumer to read from. Semaphore denotes the number of available slots in the buffer, for the producer to write to. The placeholder variables, denoted by P, Q, R, and S, in the code below can be assigned either empty or full. The valid semaphore operations are: wait ( ) and signal ( ). Producer: Consumer: do {         wait (P) ;         wait (mutex) ;         //Add item to buffer         signal (mutex) ;         signal (Q) ; } while (1) ; do {          wait (R) ;          wait (mutex) ;          //Consume item from buffer          signal (mutex) ;          signal (S) ; } while (1) ;   Which one of the following assignments to P, Q, R and S will yield the correct solution?
Based on the paragraph given below answer the following question: The traditional methods of combinational circuits involve simplification and realization using gates. Using these methods, complex functions have been integrated and are easily available in IC form. There is an attractive array of devices like a multiplexer, demultiplexer, decoders, comparators, parity generators/checkers, which significantly reduce IC package count there by reducing the system cost. The system design is greatly simplified because the laborious and time-consuming simplification methods are generally not required with these devices. This also improves the reliability of the system by reducing the number of external wired connections. But they have some limitations as well. Different memories like ROM, PROM can also be used to implement combinational circuits without much simplification.   Consider the following digital circuits. 1. Multiplexers 2. Read Only Memories 3. D-latch 4. Circuit as shown in figure below Which of these come under the class of combinational circuits?
This question comprises 3 sentences - A, B and C each of which comprises a sentence using the word WAIT. Identify the sentences where the word has been correctly used and mark that combination (A) Wait your options before investing (B) How long must we wait? (C) The longer we wait time the less is the chance of recovery
Consider the following threads, T1, T2, and T3 executing on a single processor, synchronized using three binary semaphore variables, S1, S2, and S3, operated upon using standard wait() and signal(). The threads can be context switched in any order and at any time. T1 T2 T3 While(true) { Wait(S3); Print(“C”); Signal (S2); } While(true) { Wait(S1); Print(“B”); Signal (S3); } While(true) { Wait(S2); Print(“A”); Signal (S1); }   Which initialization of the semaphores would print the sequence BCABCABCA….?
Based on the paragraph given below answer the following question: The traditional methods of combinational circuits involve simplification and realization using gates. Using these methods, complex functions have been integrated and are easily available in IC form. There is an attractive array of devices like a multiplexer, demultiplexer, decoders, comparators, parity generators/checkers, which significantly reduce IC package count there by reducing the system cost. The system design is greatly simplified because the laborious and time-consuming simplification methods are generally not required with these devices. This also improves the reliability of the system by reducing the number of external wired connections. But they have some limitations as well. Different memories like ROM, PROM can also be used to implement combinational circuits without much simplification. A logic circuit required for converting BCD Code to 7 segment Code is known as:
Based on the paragraph given below answer the following question: The traditional methods of combinational circuits involve simplification and realization using gates. Using these methods, complex functions have been integrated and are easily available in IC form. There is an attractive array of devices like a multiplexer, demultiplexer, decoders, comparators, parity generators/checkers, which significantly reduce IC package count there by reducing the system cost. The system design is greatly simplified because the laborious and time-consuming simplification methods are generally not required with these devices. This also improves the reliability of the system by reducing the number of external wired connections. But they have some limitations as well. Different memories like ROM, PROM can also be used to implement combinational circuits without much simplification.   A ROM is to be used to implement a “Squarer”, which outputs the square of a 3-bit number. What must be the size of the ROM?
Based on the paragraph given below answer the following question: The traditional methods of combinational circuits involve simplification and realization using gates. Using these methods, complex functions have been integrated and are easily available in IC form. There is an attractive array of devices like a multiplexer, demultiplexer, decoders, comparators, parity generators/checkers, which significantly reduce IC package count thereby reducing the system cost. The system design is greatly simplified because the laborious and time-consuming simplification methods are generally not required with these devices. This also improves the reliability of the system by reducing the number of external wired connections. But they have some limitations as well. Different memories like ROM, PROM can also be used to implement combinational circuits without much simplification. In a BCD Subtractor if the sum of minuend and the nine’s complement of the subtrahend is not a valid BCD Code, then which binary number is added to the sum to get the correct answer?
Based on the paragraph given below answer the following question: The traditional methods of combinational circuits involve simplification and realization using gates. Using these methods, complex functions have been integrated and are easily available in IC form. There is an attractive array of devices like a multiplexer, demultiplexer, decoders, comparators, parity generators/checkers, which significantly reduce IC package count there by reducing the system cost. The system design is greatly simplified because the laborious and time-consuming simplification methods are generally not required with these devices. This also improves the reliability of the system by reducing the number of external wired connections. But they have some limitations as well. Different memories like ROM, PROM can also be used to implement combinational circuits without much simplification. The minimum number of selection lines required for selecting one of the 16 inputs are:
The following program consists of 3 concurrent processes and 3 binary semaphores. The semaphores are initialized as S0=1, S1=0, S2=0. Process P0 Process P1 Process P2 While (true) { Wait (S0); Print ‘0’ Release (S1); Release (S2); } Wait (S1); Release (S0); Wait (S2); Release (S0);   How many times will process P0 print ‘0’? 
In which of the below-mentioned logic families, the transistors operate between cut-off and active (non-saturation) states? (i) Transistor-Transistor Logic (TTL) (ii) Schottky TTL (iii) Diode Transistor Logic (DTL) (iv) Emitter Coupled Logic (ECL) Choose the correct answer from the code given below: Code: