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Which of the following are legal lines of Java code?
1. int w = (int)888.8;2. byte x = (byte)100L;3. long y = (byte)100;4. byte z = (byte)100L;
Suppose you are compiling on a machine with 1-byte chars, 2-byte shorts, 4-byte ints, and 8-byte doubles, and with alignment rules that require the address of every primitive data element to be an integer multiple of the element's size. Suppose further that the compiler is not permitted to reorder fields: padding is used to ensure alignment. How much space will be consumed by the following array? struct { short s; char c; short t; char d; double r; int i; } A[10]; /*10-element array of structs*/
Which of the following statements are true?
Statement I Big data refers to no precise quantity, but generally refers to data in the range of Petabytes and Exabyte, i.e. billions to trillions of records, all from various sources. Big data is generated much faster. than traditional data in much larger quantities.
Statement II Big data interests industries because they are able to learn more patterns and curious variances than smaller data sets, with the capability to provide valuable insights into consumer behaviour, weather systems, financial market activity, or other phenomena.
Statement III Various departments and product lines use various applications within most organisations and store data in separate datasets. These separate databases may contain similar data, but data from one data base to another is not always consistent. This is called data silo.
With reference to 8085 microprocessor, which of the following statements are correct? 1. INR is 1-byte instruction 2. OUT is 2-byte instruction 3. STA is 3-byte instruction
In which of the following ways section 73 differs from the corresponding section 295 of the Code of Civil Procedure, 1882?
1. The words, 'where assets are held by a court,' have been substituted for words, 'whenever assets are realised by sale or otherwise in execution of a degree.'
2. The words, 'before the receipt of such assets,' have been substituted for the words, 'prior to the realisation'
3. The words, 'by which such assets are held' are omitted after the words 'made application to the court'
4. The word, 'passed' has been added after the word, 'money'
5. The words, 'interest in,' in cl. (b) have been substituted for the words, 'right against' to bring the wording of that clause into line with the Transfer of Property Act, 1882. This is a mere verbal alteration
Can 8 byte long data type be automatically type cast to 4 byte float data type?
A teacher of class V gives a set of three words (like water, land, sky) and asks them to find words which can befriend the words, words which appear before or after the words. Learners are able to make 20 words/phrase out of the given words. What is this strategy known for? 
(AB)16 এর সমতুল্য- i. (10101011)2 ii. (253)8 iii. (73)10 নিচের কোনটি সঠিক?
On a non-pipelined sequential processor, a program segment, which is a part of the interrupt service routine, is given to transfer 500 bytes from an I/O device to memory.     Initialize the address register     Initialize the count to 500 LOOP: Load a byte from device     Store in memory at address given by address register     Increment the address register     Decrement the count     If count! = 0 go to LOOP Assume that each statement in this program is equivalent to a machine instruction which takes one clock cycle to execute if it is a non-load/store instruction. The load-store instructions take two clock cycles to execute. The designer of the system also has an alternate approach of using the DMA controller to implement the same transfer. The DMA controller requires 20 clock cycles for initialization and other overheads. Each DMA transfer cycle takes two clock cycles to transfer one byte of data from the device to the memory. What is the approximate speedup when the DMA controller based design is used in place of the interrupt driven program based input-output?
An array of 2 two byte integers is stored in big endian machine in byte addresses as shown below. What will be its storage pattern in little endian machine? Address Data 0 × 104 78 0 × 103 56 0 × 102 34 0 × 101 12