Bissoy.com
Doctors Medicines MCQs Q&A

To obtain better memory utilization, dynamic loading is used. With dynamic loading, a routine is not loaded until it is called. For implementing dynamic loading ____________

To obtain better memory utilization, dynamic loading is used. With dynamic loading, a routine is not loaded until it is called. For implementing dynamic loading ____________ Correct Answer user programs can implement dynamic loading without any special support from hardware or operating system

Related Questions

With regard to computer memory, which of the following statement(s) is/are TRUE?  (A) Cache memory is 'volatile' memory. (B) Magnetic memory is 'volatile' memory.  (C) Flash memory is 'volatile' memory. (D) RAM is 'volatile' memory. Choose the correct answer from the option given below:
Consider the following statements: 1. Better memory utilization is possible with non-contiguous allocation using fixed size pages 2. Associative memory is used for providing fast access to data stored in cache memory. 3. Direct mapping of cache memory is hard to implement Which of the above statements are correct?
The maximum harbour depth below lowest low water is generally equal to
(i) loaded draft + 1.2 m when bottom is rock
(ii) loaded draft + 1.8 m when bottom is soft
(iii) loaded draft + 1.2 m when bottom is soft
(iv) loaded draft + 1.8 m when bottom is rock
Consider the following statements: Non-performing assets (NPAs) decline in value when 1. Demand revives in the ecnomy. 2. Capacity utilization increases. 3. Capacity utilization, though substantive, is yet sub-optimal. 4. Capacity utilization decreases consequent upon merger of unit. Which of the above statement are correct?
Consider the following statements in order to perform a write operation into a specified memory location, the MDR and MAR: 1. The word to be stored into the memory location is first loaded by the CPU into MDR. 2. The address of the location into which the word is to be stored is loaded by the CPU into MAR. 3. A write signal is issued by the CPU. Which of the above statements are correct ? 
A, B, C, E, F and G are six dancers. B cannot dance better than A. A is a better dancer than G. E is a better dancer than C. E cannot dance better than B or G. F is a better dancer than A. Who among these six is the best dancer?
On a non-pipelined sequential processor, a program segment, which is a part of the interrupt service routine, is given to transfer 500 bytes from an I/O device to memory.     Initialize the address register     Initialize the count to 500 LOOP: Load a byte from device     Store in memory at address given by address register     Increment the address register     Decrement the count     If count! = 0 go to LOOP Assume that each statement in this program is equivalent to a machine instruction which takes one clock cycle to execute if it is a non-load/store instruction. The load-store instructions take two clock cycles to execute. The designer of the system also has an alternate approach of using the DMA controller to implement the same transfer. The DMA controller requires 20 clock cycles for initialization and other overheads. Each DMA transfer cycle takes two clock cycles to transfer one byte of data from the device to the memory. What is the approximate speedup when the DMA controller based design is used in place of the interrupt driven program based input-output?
Saurabh is shifting his house. He loaded things on a horse-cart who cannot pull a load heavier than 300kg. He loaded the following weights on the horse-cart. Things loaded Weight A sack of wheat 150kg A sack of rice 55kg Almirah 68kg Water tank 75kg Utensils 20kg Which thing should be removed so that the weight of the load is equal to 300 kg?
A shared variable x, initialized to zero, is operated on by four concurrent processes W, X, Y, Z as follows. Each of the processes W and X reads x from memory, increments by one, stores it to memory, and then terminates. Each of the processes Y and Z reads x from memory, decrements by two, stores it to memory, and then terminates. Each process before reading x invokes the P operation (i.e., wait) on a counting semaphore S and invokes the V operation (i.e., signal) on the semaphore S after storing x to memory. Semaphore S is initialized to two. What is the maximum possible value of x after all processes complete execution?
Consider a process executing on an operating system that uses demand paging. The average time for a memory access in the system is M units if the corresponding memory page is available in memory, and D units if the memory access causes a page fault. It has been experimental measured that the average time taken for a memory access in the process is X units. Which one of the following is the correct expression for the page fault rate experienced by the process?