Interrupts and Interrupt Service Routines MCQ

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• The INTR interrupt may be masked using the flag
  ক

  direction flag

  খ

  overflow flag

  গ

  interrupt flag

  ঘ

  sign flag
• The Programmable interrupt controller is required to
  ক

  handle one interrupt request

  খ

  handle one or more interrupt requests at a time

  গ

  handle one or more interrupt requests with a delay

  ঘ

  handle no interrupt request
• The INTR interrupt may be
  ক

  maskable

  খ

  nonmaskable

  গ

  maskable and nonmaskable

  ঘ

  none of the mentioned
• If any interrupt request given to an input pin cannot be disabled by any means then the input pin is called
  ক

  maskable interrupt

  খ

  nonmaskable interrupt

  গ

  maskable interrupt and nonmaskable interrupt

  ঘ

  none of the mentioned
• NMI stands for
  ক

  nonmaskable interrupt

  খ

  nonmultiple interrupt

  গ

  nonmovable interrupt

  ঘ

  none of the mentioned
• Whenever a number of devices interrupt a CPU at a time, and if the processor is able to handle them properly, it is said to have
  ক

  interrupt handling ability

  খ

  interrupt processing ability

  গ

  multiple interrupt processing ability

  ঘ

  multiple interrupt executing ability
• While executing the main program, if two or more interrupts occur, then the sequence of appearance of interrupts is called
  ক

  multi-interrupt

  খ

  nested interrupt

  গ

  interrupt within interrupt

  ঘ

  nested interrupt and interrupt within interrupt
• An interrupt breaks the execution of instructions and diverts its execution to
  ক

  Interrupt service routine

  খ

  Counter word register

  গ

  Execution unit

  ঘ

  control unit
• While CPU is executing a program, an interrupt exists then it
  ক

  follows the next instruction in the program

  খ

  jumps to instruction in other registers

  গ

  breaks the normal sequence of execution of instructions

  ঘ

  stops executing the program