Bissoy.com
Doctors Medicines MCQs Q&A

An adder in which the bits of the operands are added one after another is

An adder in which the bits of the operands are added one after another is Correct Answer Serial adder

Serial adder is a sequential circuit. Parallel adder is a combinational circuit. In serial adder, propagation delay is less. In parallel adder, propagation delay is present from input carry to output carry. Number of required full adder is fixed i.e. one.

Related Questions

When two 8-bit numbers A7 … A0 and B7 … B0 in 2’ s complement representation (with A0 and B0 as the least significant bits) are added using a ripple-carry adder, the sum bits obtained are S7 … S0 and the carry bits are C7 … C0. An overflow is said to have occurred if
The following code segment is executed on a processor which allows only register operands in its instructions. Each instruction can have atmost two source operands and one destination operand. Assume that all variables are dead after this code segment. c = a + b; d = c * a; e = c + a; x = c * c; if (x > a) {     y = a * a; } else {      d = d * d;      e = e * e; } Suppose the instruction set architecture of the processor has only two registers. The only allowed compiler optimization is code motion, which moves statements from one place to another while preserving correctness. What is the minimum number of spills to memory in the compiled code?
Assume that a 12-bit Hamming codeword consisting of 8-bit data and 4 check bits is d8d7d6d5c8d4d3d2c4d1c2c1, where the data bits and the check bits are given in the following tables: Data bits d8 d7 d6 d5 d4 d3 d2 d1 1 1 0 x 0 1 0 1   c8 c4 c2 c1 Y 0 1 0 Which one of the following choices gives the correct values of x and y?
The following code segment is executed on a processor which allows only register operands in its instructions. Each instruction can have atmost two source operands and one destination operand. Assume that all variables are dead after this code segment. c = a + b; d = c * a; e = c + a; x = c * c; if (x > a) {     y = a * a; } else {      d = d * d;      e = e * e; } What is the minimum number of registers needed in the instruction set architecture of the processor to compile this code segment without any spill to memory? Do not apply any optimization other than optimizing register allocation.
Which statement(s) about IPv4 and IPv6 addresses are true?1. An IPv6 address is 32 bits long, represented in hexidecimal.2. An IPv6 address is 128 bits long, represented in decimal.3. An IPv4 address is 32 bits long, represented in decimal.4. An IPv6 address is 128 bits long, represented in hexidecimal.
How many redundant bits are added in block codes for k information bits and n code bits?
P and Q started a business together and after 3 months P added 1/3rd of his original investment and after 3 months to that he added same amount he invested at first. Q added 1/4th amount of what she originally invested after 4 months. What would the ratio of profits be after 12 months if initial investment by both of them was in ratio 3 : 4?
P and Q invests Rs. 400 and Rs. 300 into a partnership respectively. After 5 months, P added Rs. 100 to his investment. After 4 months, P removes double the amount he added to his investment after 5 months and Q removes the same amount P added after 5 months. If the profit share of Q is Rs.429 then what is  the total profit they had in a year?
Consider the following circuits: 1. Full adder 2. Half adder 3. JK flip-flop 4. Counter Which of the above circuits are classified as sequential logic circuits?
The difference between half adder and full adder is __________