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A 5-stage pipelined processor has Instruction Fetch (IF), Instruction Decode (ID), Operand Fetch (OF), Perform Operation (PO) and Write Operand (WO) stages. The IF, ID, OF and WO stages take 1 clock cycle each for any instruction. The PO stage takes 1 clock cycle for ADD and SUB instructions, 3 clock cycles for MUL instruction, and 6 clock cycles for DIV instruction respectively. Operand forwarding is used in the pipeline. What is the number of clock cycles needed to execute the following sequence of instructions? Instruction Meaning of instruction I0 : MUL R2, R0, R1 R2← R0 * R1 I1 : DIV R5, R3, R4 R5 ← R3 / R4 I2 : ADD R2, R5, R2 R2 ← R5 + R2 I3 : SUB R5, R2, R6 R5 ← R2 – R6
With regard to computer memory, which of the following statement(s) is/are TRUE?  (A) Cache memory is 'volatile' memory. (B) Magnetic memory is 'volatile' memory.  (C) Flash memory is 'volatile' memory. (D) RAM is 'volatile' memory. Choose the correct answer from the option given below:
Which of the following statements are true?
Statement I Big data refers to no precise quantity, but generally refers to data in the range of Petabytes and Exabyte, i.e. billions to trillions of records, all from various sources. Big data is generated much faster. than traditional data in much larger quantities.
Statement II Big data interests industries because they are able to learn more patterns and curious variances than smaller data sets, with the capability to provide valuable insights into consumer behaviour, weather systems, financial market activity, or other phenomena.
Statement III Various departments and product lines use various applications within most organisations and store data in separate datasets. These separate databases may contain similar data, but data from one data base to another is not always consistent. This is called data silo.
Which of the following statement about computer memory are true?  A. Secondary storage is non-volatile storage.  B. Video memory found in graphics cards is volatile memory.  C. Primary memory (RAM) is the fastest form of memory in a computer.  Choose the correct answer from the options given below:
Which of the following statements are correct? 1. Pseudo instruction is a machine instruction. 2. A pseudo instruction is an instruction to the assembler. 3. The ORG (origin) is an example of pseudo instruction. 4. It is not possible to use ORG more than once in a program. Select the correct answer using the code given below.
On a non-pipelined sequential processor, a program segment, which is a part of the interrupt service routine, is given to transfer 500 bytes from an I/O device to memory.     Initialize the address register     Initialize the count to 500 LOOP: Load a byte from device     Store in memory at address given by address register     Increment the address register     Decrement the count     If count! = 0 go to LOOP Assume that each statement in this program is equivalent to a machine instruction which takes one clock cycle to execute if it is a non-load/store instruction. The load-store instructions take two clock cycles to execute. The designer of the system also has an alternate approach of using the DMA controller to implement the same transfer. The DMA controller requires 20 clock cycles for initialization and other overheads. Each DMA transfer cycle takes two clock cycles to transfer one byte of data from the device to the memory. What is the approximate speedup when the DMA controller based design is used in place of the interrupt driven program based input-output?
The instruction given to a computer system is loaded into the Instruction Register. The processor interprets the instruction and performs the required action. In general, these actions fall into four categories. Which of the following actions is not a part of these four categories? 
Consider a hypothetical processor with an instruction of type LW R1, 20(R2), which during execution reads a 32-bit word from memory and stores it in a 32-bit register R1. The effective address of the memory location is obtained by the addition of constant 20 and the contents of register R2. Which of  the  following best reflects the addressing mode implemented by this instruction for the operand in memory?
Consider a hypothetical processor with an instruction of type LW R1, 20 (R2), which during execution reads a 32-bit word from memory and stores it in a 32-bit register R1. The effective address of the memory location is obtained by the addition of a constant 20 and the contents of register R2. Which of the following best reflects the addressing mode implemented by this instruction for the operand in memory?
In a company there are 252 engineers, in which the ratio of the number of electronics engineers and computer engineers is 2 ∶ 1. The ratio of the number of electronics engineers and computer engineers becomes 1 ∶ 1 after recruitment of some more computer engineers. The average age of all the engineers is now 22 years and the average age of the computer engineers is 2 years less than the average age of electronics engineers. (A) The average age (in years) of electronics engineers is 21 (B) The average age (in years) of computer engineers is 21 (C) The average age (in years) of electronics engineers is 23 (D) The average age (in years) of electronics engineers is 25 (E) The average age (in years) of computer engineers is 23 Choose the correct answer from the options given below: