What is the worst case delay of the burst refresh in 4M by 1 DRAM?
What is the worst case delay of the burst refresh in 4M by 1 DRAM? Correct Answer 0.2ms
A 4M by 1 DRAM have 1024 refresh cycles. Bursting delay will be 0.2ms that are, the worst case delay is 1024 times larger than that of the single refresh cycle. The distributed delay is about 170ns.