Sequential Circuit Design Using CPLDs MCQ

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• Which one of the following is an essential component of the macrocells of CPLDs?
  ক

  AND gate

  খ

  OR gate

  গ

  NOT gate

  ঘ

  Flip-flops
• How many flip-flops are needed in designing a shift register using CPLD?
  ক

  1

  খ

  2

  গ

  3

  ঘ

  4
• Which one of the following is a noticeable difference between FPGAs and CPLDs?
  ক

  Presence of an in built clock circuit

  খ

  Presence of non volatile on chip memory

  গ

  FPGA has a simpler circuitry

  ঘ

  FPGAs used more number of sequential circuit components
• What is the full form of CPLD?
  ক

  Combinational Programming Logic Device

  খ

  Combinational Purpose Logic Device

  গ

  Complex Programming Logic device

  ঘ

  Complex Programmed Logic Device
• How many inputs does each functional block have from the AIM in the Xilinx CoolRunner II CPLD?
  ক

  16

  খ

  40

  গ

  20

  ঘ

  30
• How many equivalent of AND gates are contained inside of each PLA of the Xilinx CoolRunner II CPLD?
  ক

  60

  খ

  56

  গ

  50

  ঘ

  66
• What is the maximum number of functional blocks available in the Xilinx CoolRunner II CPLD package?
  ক

  64

  খ

  256

  গ

  32

  ঘ

  16
• What does a typical CPLD contain?
  ক

  An array of registers and clocks

  খ

  A combination of multiplexers and decoders

  গ

  A number of macrocells those are grouped into functional blocks

  ঘ

  A number of interconnected logic gates